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P. Lesso, "A High Performance S/PDIF Receiver," Paper 6948, (2006 October.). doi: P. Lesso, "A High Performance S/PDIF Receiver," Paper 6948, (2006 October.). doi:
Abstract: This paper details the design and implementation of a novel S/PDIF transceiver with a very low jitter bandwidth. We describe and demonstrate a system based on multiple-loops that synchronises to the incoming data stream with a very low bandwidth and provides the original data unmodified on a clean low jitter output clock without the need for a sample rate converter. Thus we eliminate any jitter above a low frequency (typically 10Hz) on the input data and also avoid any distortion caused by sample rate converters.

@article{lesso2006a,
author={lesso, paul},
journal={journal of the audio engineering society},
title={a high performance s/pdif receiver},
year={2006},
volume={},
number={},
pages={},
doi={},
month={october},} @article{lesso2006a,
author={lesso, paul},
journal={journal of the audio engineering society},
title={a high performance s/pdif receiver},
year={2006},
volume={},
number={},
pages={},
doi={},
month={october},
abstract={this paper details the design and implementation of a novel s/pdif transceiver with a very low jitter bandwidth. we describe and demonstrate a system based on multiple-loops that synchronises to the incoming data stream with a very low bandwidth and provides the original data unmodified on a clean low jitter output clock without the need for a sample rate converter. thus we eliminate any jitter above a low frequency (typically 10hz) on the input data and also avoid any distortion caused by sample rate converters.},}

TY - paper
TI - A High Performance S/PDIF Receiver
SP - EP -
AU - Lesso, Paul
PY - 2006
JO - Journal of the Audio Engineering Society
IS -
VO -
VL -
Y1 - October 2006 TY - paper
TI - A High Performance S/PDIF Receiver
SP - EP -
AU - Lesso, Paul
PY - 2006
JO - Journal of the Audio Engineering Society
IS -
VO -
VL -
Y1 - October 2006
AB - This paper details the design and implementation of a novel S/PDIF transceiver with a very low jitter bandwidth. We describe and demonstrate a system based on multiple-loops that synchronises to the incoming data stream with a very low bandwidth and provides the original data unmodified on a clean low jitter output clock without the need for a sample rate converter. Thus we eliminate any jitter above a low frequency (typically 10Hz) on the input data and also avoid any distortion caused by sample rate converters.