Timing fluctuations, or jitter, in clocks can degrade audio quality when the clocks are used in analogue to digital or digital to analogue conversion. The asynchronous clocks within the IEEE1394 high performance serial bus produce jitter. This may present challenges for low jitter sample clock recovery in conjunction with the transmission of digital audio using that bus and so the nature of this jitter requires investigation. Measurements of recovered clock jitter in a simple system are presented which confirm the results of a previous simulation of jitter generation mechanisms. Possible engineering solutions are discussed.
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