Clean Audio for TV broadcast: An Object-Based Approach for Hearing-Impaired Viewers - April 2015
Audibility of a CD-Standard A/DA/A Loop Inserted into High-Resolution Audio Playback - September 2007
Sound Board: Food for Thought, Aesthetics in Orchestra Recording - April 2015
Theory and VLSI Architectures for Asynchronous Sample-Rate Converters
The theory of asynchronous sample-rate conversion is presented using both the highly interpolated signal-processing model as well as the polyphase filter model. A novel closed-loop address-tracking system is disclosed that solves the problem of clock-edge arrival estimation while at the same time providing a low-jitter selection of the correct polyphase filter for each sampling instant. The proposed signal-processing algorithm has been implemented in an all-digital VLSI chip. Measurement results show good agreement with theory.
Click to purchase paper or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $20 for non-members, $5 for AES members and is free for E-Library subscribers.