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New Digital PLL for 8-10 Modulation Code Used by DAT

This paper describes a new digital signal processor (DSP) LSI for a digital audio tape (DAT) recorder with a fully digital phase locked loop (PLL). In our newest DSP which uses a ring oscillator to lower the master clock frequency, we have improved the PLL's master to playback (PB) clock frequency ratio to 2.6, where in our currently available DSP, PLL's master to PB ratio is 5.2.

Authors: Fukuda, Shinichi; Fukami, Tadashi; Moroboshi, Arihiro
Affiliation: Sony Corporation, Tokyo, Japan
AES Convention:93 (October 1992) Paper Number:3373 Import into BibTeX
Subject:Digital Innovations in Audio Technology

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