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Description of Limit Cycles in Feedback Sigma Delta Modulators

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The authors have recently developed a framework for analysis of limit cycle behavior in feedforward sigma delta modulators (SDMs). However, the dynamics of feedback SDMs appear to be completely different. Here, we extend that framework to include limit cycles in feedback SDMs. We prove that for DC inputs, periodic output implies state space periodicity. An outcome of this is that for an Nth order SDM, at least N-1 initial conditions must be fixed in order to have limit cycle behaviour. We present expressions for the minimum disturbance of the input or initial conditions that is needed to break up a limit cycle. These expressions are notably different from the analogous expressions for feedforward SDMs. We show that dithering the quantiser is a sub-optimal approach to removing limit cycles, and limit cycle stability is determined. Examples are provided that illustrate the theoretical results, and these results are also compared with those found for feedforward SDM designs. It is shown that, with respect to limit cycle behaviour, it makes little difference whether feedforward or feedback designs are used.

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