AES E-Library

They Exist: Limit Cycles in High Order Sigma Delta Modulators

A compact form can be used to describe an arbitrary high order sigma delta modulator. Such a format is beneficial because it provides insight into the structure of limit cycles in sigma delta modulators. We consider modulators of any order with periodic output. We make no assumptions regarding the input and are thus able to prove necessary conditions for limit cycles in the output. We show that the input must be periodic, but may have a different period from both integrator output and quantised output. We derive what this implies regarding limit cycles for sinusoidal inputs. Finally, we give examples where sinusoidal input to a third order modulator results in a limit cycle of a different frequency.

Authors: Reiss, Joshua D.; Sandler, Mark B.
Affiliation: Department of Electronic Engineering, Queen Mary, University of London, London, UK
AES Convention:114 (March 2003) Paper Number:5832 Import into BibTeX
Subject:Low Bit-Rate Coding

Click to purchase paper or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!

This paper costs $20 for non-members, $5 for AES members and is free for E-Library subscribers.

Learn more about the AES E-Library

E-Library Location: (CD aes20)   /pp2003/pp0303/00124.pdf

Start a discussion about this paper!