An Integrated Digital Audio Signal Processor
This paper describes a fully programmable integrated signal processor for digital audio signals (audio signal processor). The key features of the ASP chip are: 1 160 ns instruction cycle time, a 12*24 multiplier, and a wide accumulator. It also contains three separate RAMs, one for storing the program, a second for the audio data, and a third for the coefficients. The chip has several serial audio data interfaces (IIS format), a parallel data interface, and a serial control interface (IIC format). This chip contains all functions for the investigation and the realization of digital sound processing features.
Click to purchase paper or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $20 for non-members, $5 for AES members and is free for E-Library subscribers.