AES Store

Journal Forum

Perceptual Effects of Dynamic Range Compression in Popular Music Recordings - January 2014
4 comments

Accurate Calculation of Radiation and Diffraction from Loudspeaker Enclosures at Low Frequency - June 2013
9 comments

New Measurement Techniques for Portable Listening Devices: Technical Report - October 2013
1 comment

Access Journal Forum

AES E-Library

Configurable Microprocessor Implementation of Low Bit Rate Audio Decoding

Using a configurable microprocessor to implement low-bit-rate audio applications by tailoring the instruction set reduces algorithm complexity and implementation cost. As an example, this paper describes a Dolby Digital (AC-3) decoder implementation that uses a commercially-available configurable microprocessor to achieve 32-bit floating-point precision while minimizing the required processor clock rate and die size. This paper focuses on how the audio quality and features of the reference decoder algorithm dictate the customization of the microprocessor. This paper shows examples of audio specific extensions to the processor's instruction set to create a family of AC-3 decoder implementations that meet multiple performance and cost points. How this approach benefits other audio applications is also discussed.

Author:
Affiliation:
AES Convention: Paper Number:
Publication Date:
Subject:

Click to purchase paper or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!

This paper costs $20 for non-members, $5 for AES members and is free for E-Library subscribers.

Learn more about the AES E-Library

E-Library Location:

Start a discussion about this paper!


 
Facebook   Twitter   LinkedIn   Google+   YouTube   RSS News Feeds  
AES - Audio Engineering Society