A data conversion technique suitable for digital power amplifiers (DPAs) is described, based on a modified sigma-delta modulator. The pulse-repetition frequency (PRF) in the bit stream is reduced in order to increase the efficiency in the power output switching stage. The system offers PRFs comparable to pulse-width-modulation (PWM)-based DPAs, but with higher linearity and more than a thirty-fold reduction in bit-clock frequency.
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