The system is controlled by a Master Processor which accesses the Channel Faders and the Switchpoint Matrix. The Attenuators are realized by logarithmic D/A converters and grant a step size of 0.375 dB over the fading range between 0 and -88.5 dB. Fading, routing, and mixing (internal processes) are bound to SMPTE frames, using the device-internal SMPTE-Generator. In addition, external processes (triggering of events, dynamic access to- and redefinition of remote equipment can be synchronized via a range of communication links. All internal and external processes can be stored to and recalled fro the device internal removable Mass Storage (high capacity RAM cards). In addition to the principal hardware realization, the paper will cover some aspects of process synchronization.
https://www.aes.org/e-lib/browse.cfm?elib=4801
Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $33 for non-members and is free for AES members and E-Library subscribers.
Learn more about the AES E-Library
Start a discussion about this paper!
