A level compacting machine is proposed that combines a quantiser of limited resolution with oversampling and Nth-order feedback to maintain a more optimum signal transparency. The system, designated sigma-ADC (DDC), finds applications at the analogue-digital, digital-analogue gateways and allows amplifier studies to be applied directly to ADC. Other cited applications include oversampled DAC and code conversions to DSM and PWM formats. Both analogue-digital and all digital constructions are presented, together with supporting computer simulation using transient analysis procedures.
Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $33 for non-members and is free for AES members and E-Library subscribers.