To use one-bit Sigma-Delta Modulation (SDM) in digital class-D power amplifiers the effective pulse frequency has to be reduced. This paper contains a review about this problem. It will be shown, how the efficiency of the amplifier is degraded by too high pulse frequencies. Fundamental approaches to create high resolution pulse signals with lower pulse rates around 300 to 500 kHz will be shown. One of these is a controlled generation of the pulse-pattern, like it is done in the "Bit-Flipping". Alternative approaches can be found, when the dependency of the generated pulse patterns by the loop filter structure is considered.
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