Adaptive WP tree derived via dynamic algorithm transforms (DAT's) is presented. The DAT is to define parameter of input audio signals (subband entropy) and output codered sequences (subband rate) for the given embedded system architecture. A DAT-based pipe-line processor (WP trees analysis (encoder) and synthesis (decoder) algorithms) based on a reconfigurable hardware (such as SRAM-FPGA plus distributed arithmetic) is described.

Authors: Petrovsky, Alexey; Petrovsky, Alexander
Affiliations: Computer Engineering Department at the Belarusian State University of Informatics and Radioelectronics, Minsk, Republic of Belarus ; Real-Time Systems Department at the Technical University Bialystok, Bialystok, Republic of Poland(See document for exact affiliation information.)
AES Convention: 110 (May 2001) Paper Number: 5298
Publication Date: May 1, 2001 Import into BibTeX
Subject: Low-Bit Rate Audio Coding
Permalink: https://www.aes.org/e-lib/browse.cfm?elib=10021

Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!

This paper costs $33 for non-members and is free for AES members and E-Library subscribers.

Learn more about the AES E-Library

E-Library Location: (CD aes18)   /pp2001/pp0105/110007.pdf

Start a discussion about this paper!