Adaptive WP tree derived via dynamic algorithm transforms (DAT`s) is presented. The DAT is to define parameter of input audio signals (subband entropy) and output codered sequences (subband rate) for the given embedded system architecture. A DAT-based pipe-line processor (WP trees analysis (encoder) and synthesis (decoder) algorithms) based on a reconfigurable hardware (such as SRAM-FPGA plus distributed arithmetic) is described.
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