AES Section Meeting Reports

Pacific Northwest - November 17, 2009

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AES PNW Section Meeting Report v.2.0

How Do They Make THAT Chip?
Bob Moses, IC Program Manager, THAT Inc.

Meeting held November 17, 2009, at Shoreline Community College, Shoreline, WA

The PNW Section's November meeting featured Bob Moses, IC Program Manager for THAT Corp, speaking about the designing and manufacturing of audio ICs. 11 AES members and 18 nonmembers attended.

Chair Steve Turnidge opened, had all attendees introduce themselves, and asked how people found out about the meeting (web notice/friend/Twitter etc). The next meetings were announced; January 2010 would be Sean Olive and Floyd Toole, February tentatively would be on modular analog synthesizers.

Bob Moses, IC Program Manager for THAT Corp. and a past AES President, spoke about designing and manufacturing audio integrated circuits. He started with a little background of THAT Corp and showed slides of the headquarters in Massachusetts. Privately owned, the name comes from the founders - Paul Traveline, Gary Hebert And Les Tyler. The roots are from part of the old dbx company. Their television sound technology is used in the legacy USA Multichannel Television Sound (MTS) system. Bob played a short video of Les Tyler giving a little tour of THAT's historic headquarters. THAT is the only company with their own IC semiconductor foundry devoted exclusively to making pro audio ICs.

Their newest products are their 1570 microphone preamp chip and 5171 digital preamp controller chip (actually fabricated for them because of the CMOS process needed). Bob described their approaches to solving problems usually associated with digitally controlling an analog amplifier, like zipper noise when the gain is changed. They achieved the lowest noise, highest dynamic range monolithic mic preamp product they know of. He reviewed terms such as noise floor, dynamic range, etc. The 5171 controller works on any suitable preamp, not just their own. He also described other THAT products.

Bob then described just what an IC is and how they are constructed. Like cooking, there is a detailed recipe used to fabricate them. A little atomic theory review was presented to explain the semiconductors and how they are made, constructed and operate.

After a refreshment break, door prize winners were picked:

-Pomona XLR to binding post adapters; Meterman DMM; IR thermometer - courtesy of Rick Rodriguez/Fluke - Steve Wilkins; Steve Malott; Steve Turnidge; Bob Cavanaugh
-THAT coffee mug; flying disc; tie-dyed shirt; cleanroom bunny suit; silicon wafer samples - Rick Chinn; Bob Gudgel; Wayne Edwards; Rob Baum; Craig Rosenberg & René Jaeger
-CDs from Burning Sky Records - Bob Smith; Greg Mauser; Brian Willoughby; Gary Louie

Following the break, Bob continued with How to Make ICs. Slides were shown of the main steps:
-make ingots of pure silicon
-slice ingots into wafers - they buy the wafers
-add oxide layer to wafers
-add photoresist
-place quartz mask on top
-expose to UV light (photolithography)
-etch away oxide not under mask
-remove photoresist
-add dopant; heat diffuse in ovens
-remove oxide
-repeat main steps 3-11 times to create desired layers of semiconductors
-metalization - add conductors where needed to connect devices
-passivation - add glass layer of protection on top, leaving access holes for wires

Wafer sizes vary as does the number of dies on a wafer. Yields are top secret! THAT does a 5 micron process (Pentium - type devices are sub-micron) and uses the dielectric isolation (DI) method of construction instead of the junction isolation method. A comparison of the two methods was made. The DI method has characteristics that make good audio devices, and is also used for radiation hardened MIL spec devices. There are no problematic parasitic capacitances and diode effects from the construction, but micro machining is required to make little isolation tubs in the chips. It can take months to complete the chips. Video and photos were shown of the THAT IC fabrication facility in Milpitas, CA.

Next, wafer testing machines test each die on a wafer. They can even run audio through the unpackaged wafers for further tests. Additional steps include:

-laser trimming of resistors
-sawing dice from wafers (dicing)
-packaging/wire bonding
-encapsulation - epoxy packages
-final testing - on machines - (a video shown)
-marking - ink printing (video)

How an IC is developed and designed was explained.

-A product idea is spec'd (market need, etc)
-is any new R&D needed, such as new foundry processes?
- Designs are made, verified, tested and simulated
-wafers are made, tested
-functional testing of preproduction chips
-qualification testing - torture tests done
-documentation written

A video was shown of co-founder Gary Hebert talking about the process of designing the chips (using PSPICE), simulation testing, layout and design techniques. Bob noted most of the work can now be done on a laptop computer.

Bob told how digital IC requirements are run through "synthesis" to develop the silicon chip design. There is manufacturing design rule checking, "tape out" is the term used to convey the design to manufacturing.

Lastly, details of the design and construction of the microphone and controller chip evaluation circuit board were explained, which PNW Chair Steve Turnidge designed with Bob Moses.

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AES - Audio Engineering Society