AES San Francisco 2008
Friday, October 3, 5:30 pm — 6:45 pm
T8 - Free Source Code for Processing AES Audio Data
:Gregg C. Hawkes
, Xilinx - San Jose, CA, USAReed Tidwell
, Xilinx - San Jose, CA, USA
This session is a tutorial on the Xilinx free Verilog and VHDL source code for extracting and inserting audio in SDI streams, including “on the fly” error correction and high performance, continuously adaptive, asynchronous sample rate conversion. The audio sample rate conversion supports large ratios as well as fractional conversion rates and maintains high performance while continuously adapting itself to the input and output rates without user control. The features, device utilization, and performance of the IP will be presented and demonstrated with industry standard audio hardware.