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AES Amsterdam 2008
P6 - Mobile Phone Audio
Poster Session P6
Saturday, May 17, 16:00 — 17:30
P6-1 Enhancements to the SBC CODEC for Voice Communication in Bluetooth Devices —Laurent Pilati, Broadcom Corp. - Sophia Antipolis, France; Mohammad Zad-issa, Broadcom Corp. - Irvine, CA, USA
The Bluetooth Audio Distribution profile has uses low complexity sub-band coder (SBC) as its mandatory audio compression codec. More recently, SBC has been selected for Bluetooth wideband voice communication. Since SBC was first designed with audio compression, it does not incorporate the features that speech coders commonly use. The use of voice activity detection and comfort noise generation to reduce bandwidth usage and power consumption is an example. In this paper we investigated extensions for SBC that would make it better suited for voice compression in the Bluetooth framework. The proposed enhancements were evaluated on the basis of their impact on voice quality, their implementation requirements, and their bandwidth power savings.
Convention Paper 7347 (Purchase now)
P6-2 Efficiently Shuffling Large Sets of Clips —Ulrich Herrmann, austriamicrosystems - Graz, Austria
A method for randomly shuffling through large sets of video or audio clips is presented in this paper. Many up-to-date devices have only a rather limited capability of shuffling only up to 200 or 256 songs. This algorithm presents a way of shuffling even large sets with an almost unlimited number of items. It also provides the ability to traverse back and forth with little processing power on today’s micro controllers. All this is done with few bytes of code and almost no RAM.
Convention Paper 7348 (Purchase now)
P6-3 Hardware/Software Co-design of Multi-Format Audio Decoder —ChangYong Son, KangEun Lee, DoHyung Kim, Soojung Ryu, Shihwa Lee, Samsung Advanced Institute of Technology - Suwon, Korea
This paper presents a hardware/software co-design method for the implementation of a multi-format audio decoder with ultra low power, small chip size, and high flexibility, which are the most critical factors in embedded devices. This approach can provide both flexibility and low power with high performance in such a way that hardware implementation has been focused on the commonly used critical blocks of multiple audio decoders having intensive computations. Hardware blocks are well modularized to allow easy and rapid architecture exploration of several digital audio standards. The proposed system can decode an MP3 bitstream using only about 4 MHz clock frequency and AAC bitstream using only about 7 MHz clock frequency on average at the sampling rate of 48 kHz and the target bit rate of 128 kbps/stereo.
Convention Paper 7349 (Purchase now)
P6-4 Audio Enhancement for Portable Device-Based Speech Applications—Rory Turnbull, Peter Hughes, Steve Hoare, BT Group CTO - Ipswich, Suffolk, UK
Portable devices with audio capabilities necessitate the use of small transducers, often with poor frequency responses. This can be a limiting factor in the perception of the speech quality of VoIP services hosted on such a device. This paper seeks to investigate the problem and provide practical solutions through the use of appropriate enhancement technologies. The paper covers the use of equalization, dynamic range compression, and psychoacoustic bass enhancement as possible methods for improving intelligibility. Subjective tests are used to evaluate the enhancements prior to making practical recommendations.
Convention Paper 7350 (Purchase now)
P6-5 An Efficient, Low-Noise Filter Architecture for Bass Processing on a Processor Core—Peter Eastty, Nathan Bentall, Duncan Stott, Oxford Digital Limited - Stonesfield, Oxfordshire, UK
Bass Enhancement is becoming popular in many forms of consumer devices. Whatever technique is used on whatever processor, the low frequency filtering involved is frequently the major determinant of system signal-to-noise ratio. The architecture described combines an efficient, cascaded, low-pass FIR filter and a poly-phase adaptation of standard low frequency IIR filtering. The resulting circuit achieves a 20 to 30 dB improvement in signal to noise ratio at the cost of only 12 instructions per sample. The technique may be applied to any bass processing using fixed or floating point processors. Complete design tables for the cascaded FIR filters are given as are noise spectrum plots of the results.
Convention Paper 7351 (Purchase now)
P6-6 Implementation of Dynamic Voltage and Frequency Scaling on Portable Audio Players—Dahyanto Harliono, Woon-Seng Gan, Nanyang Technological University - Singapore
Current portable computing devices demand not only higher performance but also lower power consumption. For the same reason, this research aims to build a framework that enables a rapid design of energy-efficient embedded systems. Specifically, this research is focused on a dynamic voltage scaling algorithm, which has been found effective in saving power consumption. We developed a method of scaling voltage and frequency dynamically on the latest embedded processor, jointly designed by Analog Devices and Intel. The rationale behind this method is to avoid the processor being idle in high operating frequency and voltage. Instead, the processor can save power by running its task at a lower frequency and voltage, and completing it just before the real-time deadline. Furthermore, our method can also be implemented in other embedded processors with voltage-frequency scaling features.
Convention Paper 7352 (Purchase now)
Last Updated: 20080612, tendeloo