A data conversion technique suitable for power digital-to-analog converters is described, based on a modified sigma-delta modulator. The pulse-repetition frequency in the bitstream is reduced in order to increase the efficiency in the power output switching stage. The system offers pulse-repetition frequencies comparable to pulse-width modulation-based digital-to-analog converters, but with higher linearity and more than a thirty-fold reduction in clock frequency.

Authors: Magrath, Anthony J.; Sandler, Mark B.
Affiliation: King's College London, Strand, London, UK
AES Convention: 99 (October 1995) Paper Number: 4106
Publication Date: October 1, 1995 Import into BibTeX
Subject: Conversion Technology
Permalink: https://www.aes.org/e-lib/browse.cfm?elib=7660

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