Journal Forum

A Meta-Analysis of High Resolution Audio Perceptual Evaluation - June 2016

Synthetic Reverberator - January 1960

Sound Board: High-Resolution Audio - October 2015

Access Journal Forum

AES E-Library

VLSI Architectures for Asynchronous Sample-Rate Conversion

Document Thumbnail

The theory of asynchronous sample-rate conversion is presented using both the highly-interpolated signal-processing model as well as the polyphase filter model. A novel closed-loop address-tracking system is disclosed that solves the problem of clock-edge arrival estimation while at the same time providing a low-jitter selection of the current polyphase filter for each sampling instant. The proposed signal-processing algorithm is well-suited to VLSI implementation, with only modest amounts of RAM, ROM, and digital filter hardware required.

AES Convention: Paper Number:
Publication Date:

Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!

This paper costs $33 for non-members and is temporarily free for AES members.

Learn more about the AES E-Library

E-Library Location:

Start a discussion about this paper!

Facebook   Twitter   LinkedIn   Google+   YouTube   RSS News Feeds  
AES - Audio Engineering Society