Field-Programmable Gate-Array-Based 32-Times Oversampling Eighth-Order Sigma-Delta Audio DAC
A novel Sigma-Delta based audio DAC system is presented. The converter operates at only 32-times oversampling (1.4 MHz) and uses an eighth-order Sigma-Delta modulator implemented in a single FPGA circuit. Two different DAC circuits have been implemented: One using switched capacitor charge packets and one using nonreturn to zero pulses. A voltage-controlled Xtal oscillator-based PLL ensures low-jitter sampling clock recovery.
Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $33 for non-members and is temporarily free for AES members.