AES Store

Journal Forum

Audibility of a CD-Standard A/DA/A Loop Inserted into High-Resolution Audio Playback - September 2007
10 comments

Reflecting on Reflections - June 2014
1 comment

Quiet Thoughts on a Deafening Problem - May 2014
1 comment

Access Journal Forum

AES E-Library

Field-Programmable Gate-Array-Based 32-Times Oversampling Eighth-Order Sigma-Delta Audio DAC

A novel Sigma-Delta based audio DAC system is presented. The converter operates at only 32-times oversampling (1.4 MHz) and uses an eighth-order Sigma-Delta modulator implemented in a single FPGA circuit. Two different DAC circuits have been implemented: One using switched capacitor charge packets and one using nonreturn to zero pulses. A voltage-controlled Xtal oscillator-based PLL ensures low-jitter sampling clock recovery.

Author:
Affiliation:
AES Convention: Paper Number:
Publication Date:
Subject:

Click to purchase paper or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!

This paper costs $20 for non-members, $5 for AES members and is free for E-Library subscribers.

Learn more about the AES E-Library

E-Library Location:

Start a discussion about this paper!


 
Facebook   Twitter   LinkedIn   Google+   YouTube   RSS News Feeds  
AES - Audio Engineering Society