Clean Audio for TV broadcast: An Object-Based Approach for Hearing-Impaired Viewers - April 2015
Audibility of a CD-Standard A/DA/A Loop Inserted into High-Resolution Audio Playback - September 2007
Sound Board: Food for Thought, Aesthetics in Orchestra Recording - April 2015
VLSI Implementation of a Fully Digital Asynchronous Audio Sample-Rate Converter
A VLSI circuit is presented that performs sampling rate conversion of digital stereo audio signals. Conceptually, the converter interpolates to 4 Ghz, and then decimates to the desired output sampling rate. The chip is intended for 18-bit professional audio applications with arbitrarily varying input and output sampling frequencies from 25 to 70 kHz. Out chip is compared in architecture and performance to the commercial realization presented in (2) (Analog Devices AD1890).
Click to purchase paper or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $20 for non-members, $5 for AES members and is free for E-Library subscribers.