As the resolution of digital-to-analog converters (DACs) increases, testing and integrating the devices into digital audio systems becomes difficult. Performance degradation can occur due to many subtle phenomena usually not considered. This document presents techniques used by UltraAnalog to test a Dual 20 Bit 200 KHz DAC, and many of the techniques can be applied when integrating high resolution DACs into digital systems. The test system block diagram is presented and discussed with particular attention to maintaining output signal integrity. Jitter on the output deglitcher hold signal is eliminated by the use of an ultra-low jitter programmable clock (<3ps jitter). A proper grounding scheme, also presented herein, prevents the contamination of the sensitive analog section by digital noise. Additional testing errors caused by analog output filters and limitations of commercial test systems are also discussed and solutions are proposed. The overall test system allows D/A Converter distortion-plus-noise measurements better than -110dBc.
https://www.aes.org/e-lib/browse.cfm?elib=5484
Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $33 for non-members and is free for AES members and E-Library subscribers.
Learn more about the AES E-Library
Start a discussion about this paper!