AES E-Library

AES E-Library

Effect of DAC Deglitching on Frequency Response

Document Thumbnail

Sample-and-hold circuits used in deglitching state changes of digital-to-analog converters should normally be time-constant limited during the sample or tracking period to prevent the buffer amplifier input from saturating, which results in undesirable slewing and distortion. This time-constant limiting keeps the sample-and-hold circuit operating linearly but adversely affects the frequency response, particularly when the sample period is small compared to the sampling period (sample + hold) as in multichannel multiplexing audio systems. The equivalent transfer function of the deglitching process is derived and the corresponding frequency response is plotted in a typical application. A method of frequency compensation of this effect is proposed.

JAES Volume 36 Issue 11 pp. 895-903; November 1988
Publication Date:

Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!

This paper costs $33 for non-members and is free for AES members and E-Library subscribers.

Learn more about the AES E-Library

E-Library Location:

Start a discussion about this paper!

AES - Audio Engineering Society