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Switching Limits of High-Power-MOSFETS in Audio Output Stages

The model introduced here describes the effects of the propagation delay of the gate signal. It may be used to show the effects of the on-chip delay of applied gate voltage on the surface of a single MOSFET (the vertical power MOSFET consists of a large number of paralleled cells) as well as of discrete paralleled devices.

Authors: Thoma, J.; Pichler, H.; Pavuza, F.
Affiliation: Technical University, Vienna, Austria
AES Convention:84 (March 1988) Paper Number:2569 Import into BibTeX
Subject:Audio Circuitry

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