Synchronized Swept-Sine: Theory, Application, and Implementation - October 2015
Effect of Microphone Number and Positioning on the Average of Frequency Responses in Cinema Calibration - October 2015
The Measurement and Calibration of Sound Reproducing Systems - July 2015
Switching Limits of High-Power-MOSFETS in Audio Output Stages
The model introduced here describes the effects of the propagation delay of the gate signal. It may be used to show the effects of the on-chip delay of applied gate voltage on the surface of a single MOSFET (the vertical power MOSFET consists of a large number of paralleled cells) as well as of discrete paralleled devices.
Click to purchase paper or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $20 for non-members, $5 for AES members and is free for E-Library subscribers.