The application of convolutional error correcting codes to digital audio is examined. One implementation (R 2/3, 30 taps) requiring one extra bit for each two information bits, has been simulated and would perform about one miscorrection per hour at a mean bit error rate of 10-3. The decoding hardware would consist of 20 Kbits of memory and a comparatively small amount of logic. Implementation as an integrated circuit would be feasible.

Authors: DeBenedictis, Erik; Komamura, Mitsuya; Locanthi, Bart; White, Larry
Affiliation: Pioneer North America Development Laboratory, Pasadena, CA
AES Convention: 67 (October 1980) Paper Number: 1702
Publication Date: October 1, 1980 Import into BibTeX
Permalink: https://www.aes.org/e-lib/browse.cfm?elib=3674

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