Before designing to stabilize circuit drift due to changing temperatures it is helpful and sometimes necessary to understand and explain the physics of the observed drifts. In the case of the Junction Gate FET this enables minimizing of temperature effects using the characteristics of the device itself. It is the purpose of this paper to outline FET temperature characteristics.
Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $33 for non-members and is free for AES members and E-Library subscribers.