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Dual Channel Audio Decoding Architecture of Digital TV SoC

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In this paper, we describe design issues of an audio decoding processor that can be applied especially to decoding and/or encoding more than two audio contents simultaneously. The dual channel decoding is an emerging issue in the upcoming convergent multimedia applications including Digital TV, DVD, cellular phone, and Internet audio. To satisfy various requirements for dual channel decoding, we propose a novel DSP hardware architecture and a software structure. Keywords: Dual channel decoding, DSP, SoC, Dual CPU, Digital TV.

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Permalink: http://www.aes.org/e-lib/browse.cfm?elib=13876

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