Digital class-D amplifiers are cost-effective solutions for a wide range of digital audio applications, because of their high power efficiency and ease of integration. This paper presents a real-time cost-effective power supply correction algorithm, which increases the power supply rejection of an open-loop digital class-D amplifier substantially. It enables open-loop digital class-D amplifiers with inexpensive power supplies with less decoupling. Measurements on a prototype amplifier with single-ended speaker loads show 57dB suppression for 100Hz supply ripple, while intermodulation products between a 100Hz ripple and a 1kHz tone are attenuated with 40dB. The dynamic range of the amplifier is 94dB, which is in agreement with phase noise measurements on the on-chip clock generator.

Authors: Biallais, Arnaud; de Buys, Frans; de Saint-Moulin, Renaud; Dooper, Lûtsen; Putzeys, Bruno; Reefman, Derk; Rutten, Robert; Tol, Jeroen; van den Boom, Jeroen
Affiliations: Hypex Electronics; Philips Applied Technologies Leuven; Philips Research Laboratories; Philips Semiconductors; Philips Software(See document for exact affiliation information.)
AES Convention: 121 (October 2006) Paper Number: 6860
Publication Date: October 1, 2006 Import into BibTeX
Subject: Digital Amplifiers
Permalink: https://www.aes.org/e-lib/browse.cfm?elib=13694

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