Network-based digital audio interfaces are becoming increasingly popular. But they do pose a significant jitter problem wherever high-quality conversion to/from analog is required. This is true even with networks such as 1394 that provide dedicated support for isochronous flows. Conventional PLL solutions have too-little jitter attenuation, too-much intrinsic jitter, and/or too-narrow a frequency range. More-advanced solutions tend to have too-high a cost. We present a new clocking technology that boasts high performance and low cost. It has been implemented in a recent audio-over-1394 chip. We show comparative performance results and explore system-level implications, including for systems that use point-to-point links such as AES3, SPDIF and ADAT.

Authors: Frandsen, Christian G.; Travis, Chris
Affiliations: Sonopsis Ltd; TC Electronic A/S(See document for exact affiliation information.)
AES Convention: 120 (May 2006) Paper Number: 6700
Publication Date: May 1, 2006 Import into BibTeX
Session Subject: Signal Processing; High Resolution Audio
Permalink: https://www.aes.org/e-lib/browse.cfm?elib=13504

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