PWM Amplifier Control Loops with Minimum Aliasing Distortion
PWM class-D audio power amplifiers contain typically a control loop filter network and a comparator producing the PWM signal. The comparator performs a sampling operation whenever it changes state. A previous paper by the author analyzed this sampling behavior from a small signal point of view. The present paper attempts to formulate a large-signal model that accounts for the non-linear effects of the sampling due to aliasing of high frequency carrier components. The model is validated using simulations and a class of loop filters is presented that obtains minimum aliasing distortion thanks to the use of quadrature sampling. Finally, measurement data are presented for real applications using the principles described.
Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $33 for non-members and is temporarily free for AES members.