AES E-Library

AES E-Library

FPGA Implementation of an Audio Processor

Document Thumbnail

Implementing hardware design in Field Programmable Gate Arrays is a formidable and an interesting task especially when considering digital signal processing applications. Hardware design skills and strong background in signal processing are required. Sometimes problems arise in realizing hardware implementation for a simple design of systems where the theoretical concept is plausible; care should be taken to account for minute design details. The objective of this paper is to present the design of a digital audio signal processor which performs multi-effect processing and at the same time is capable of real time configurability on a single FPGA chip. The design is specific to certain algorithmic tasks; there is no need for general purpose architecture and it can be characterized as a system on chip application. It is configurable and able to change coefficients utilizing Look up Tables and is capable of performing filtering and echo/delay generation.

AES Convention: Paper Number:
Publication Date:

Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!

This paper costs $33 for non-members and is free for AES members and E-Library subscribers.

Learn more about the AES E-Library

E-Library Location:

Start a discussion about this paper!

AES - Audio Engineering Society