A compact form can be used to describe an arbitrary high order sigma delta modulator. Such a format is beneficial because it provides insight into the structure of limit cycles in sigma delta modulators. We consider modulators of any order with periodic output. We make no assumptions regarding the input and are thus able to prove necessary conditions for limit cycles in the output. We show that the input must be periodic, but may have a different period from both integrator output and quantised output. We derive what this implies regarding limit cycles for sinusoidal inputs. Finally, we give examples where sinusoidal input to a third order modulator results in a limit cycle of a different frequency.

Authors: Reiss, Joshua D.; Sandler, Mark B.
Affiliation: Department of Electronic Engineering, Queen Mary, University of London, London, UK
AES Convention: 114 (March 2003) Paper Number: 5832
Publication Date: March 1, 2003 Import into BibTeX
Subject: Low Bit-Rate Coding
Permalink: https://www.aes.org/e-lib/browse.cfm?elib=12491

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