High performance DSPs have been used extensively for the implementation of signal transforms in transform based audio coders. While the first generation of DSPs featured single stage MAC (Multiple Accumulate) blocks, the current generation of DSPs feature dual-MAC hardware blocks. Though fast algorithms are available for implementation of transforms, a re-look at the algorithms from this semi-parallel architecture point of view is beneficial as it leads to more efficient implementations. This paper looks specifically at the family of lapped transforms, and quantifies the implementation efficiency of traditional fast optimizations on architectures with this type of semi-parallel computing capability, and derives algorithmic methods of increasing this efficiency.
Click to purchase paper as a non-member or login as an AES member. If your company or school subscribes to the E-Library then switch to the institutional version. If you are not an AES member and would like to subscribe to the E-Library then Join the AES!
This paper costs $33 for non-members and is free for AES members and E-Library subscribers.