For live digital audio systems with high-resolution multichannel functionalities, it is desirable to have accurate latency control and estimation over all the stages of digital audio processing chain. The evaluation system we designed supports 12 channel, 24 bits Sigma Delta based ADC/DAC, incorporating both a programmable FPGA and a Digital Signal Processor. It can be used for testing and evaluation of different ADC/DAC digital filter architectures, audio sample buffer subsystem design, interrupt and scheduling, high level audio processing algorithm and other system factors, which might cause the latency effects. It also can estimate the synchronization and delay of multiple channels.

Authors: Wang, Yonghao; Zhu, Xiangyu; Fu, Qiang
Affiliations: Birmingham City University, Birmingham, UK; Queen Mary University of London, London, UK; Hebei University of Science and Technology, Shijiazhuang, China; Shijiazhuang Mechanical Engineering College, Shijiazhuang, China(See document for exact affiliation information.)
AES Convention: 132 (April 2012) Paper Number: 8678
Publication Date: April 26, 2012 Import into BibTeX
Subject: Audio Equipment and Instrumentation
Permalink: https://www.aes.org/e-lib/browse.cfm?elib=16316

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